| 摘要 |
Procedure for the manufacture of electronic interconnections using thin layer technology. It has as its objective that of obtaining the construction on a substrate 1 of an interconnection of very high density and resolution, with a low resistivity in which resistances of high stability and small dimensions are incorporated. It includes a first phase 2 of cleaning of the substrate by means of etching at low pressure; a second phase 3 of metallisation 15 by means of reactive cathodic sputtering; a third phase 4 of metallisation 16 and 17 or 16' means of cathodic sputtering carried out sequentially with the previous phase; a fourth phase of negative masking 5 to protect the non- conducting zones; a fifth phase 6 of growth in which a metal conductor 30 is deposited in those places not protected by the masking; a sixth phase 7 of removal of the masking by means of selective etching at low pressure, a seventh phase 8, selective etching of the metallisations 17 and 16 or 16' by means of etchings at low pressure; an eighth phase 10 of positive masking in the zone of resistances; a ninth phase 11, selective etching of the metallisation 15 at low pressure; a tenth phase 12 of removal of the masking by means of selective etching at low pressure, the interconnection circuit remaining defined. <IMAGE>
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