| 摘要 |
PURPOSE:To attain synchronization clear and to reduce the occupied area of the circuit by closing a 1st switch means in series connection between an input section or an output section of a 1st latch circuit and a reference voltage in the case of clearing and closing a 2nd switch means when a 1st transfer gate is interrupted. CONSTITUTION:N-channel MOS transistors(TRs) 1, 2 in series connection are arranged between a 1st latch circuit and ground level GND. The N-channel MOS TR 1 acts like a 1st switch means, a ground output GND is fed to its source and its drain connects to a source of the N-channel MOS TR 2 being a 2nd switch means. A signal the inverse of CL is fed to the gate of the N- channel MOS TR 2 and the N-channel MOS TR 1 is conductive when a clear pulse is fed to the gate. A signal CKI is fed to the gate of the N-channel MOS TR 2 and conductive when a 1st transfer gate is interrupted. Thus, the clearing is synchronized with a clock signal and the occupied area is decreased. |
