发明名称 Stress modulation in field effect transistors in reducing contact resistance and increasing charge carrier mobility
摘要 Field-effect transistor and method of fabrication are provided for, for instance, providing a gate structure disposed over a substrate. The fabricating method further includes forming a source and drain region within the substrate separated by a channel region, the channel region underlying, at least partially, the gate structure. Forming further includes implanting at least one dopant at a pre-selected temperature into the source and drain region to facilitate increasing a concentration of the at least one dopant within the source and drain region, where the implanting of the at least one dopant at the pre-selected temperature facilitates reducing contact resistance of the source and drain region and increasing charge carrier mobility through the channel region.
申请公布号 US9419103(B2) 申请公布日期 2016.08.16
申请号 US201514593264 申请日期 2015.01.09
申请人 GLOBALFOUNDRIES INC. 发明人 Togo Mitsuhiro
分类号 H01L29/66;H01L21/265;H01L29/78;H01L21/3215;H01L21/324 主分类号 H01L29/66
代理机构 Heslin Rothenberg Farley & Mesiti P.C. 代理人 Heslin Rothenberg Farley & Mesiti P.C.
主权项 1. A method comprising: fabricating a field-effect transistor, the fabricating comprising: providing a gate structure disposed over a substrate; and forming a source and drain region within the substrate separated by a channel region, the channel region underlying, at least partially, the gate structure, and the forming comprising implanting at least one dopant at a pre-selected temperature into the source and drain region to facilitate increasing a concentration of the at least one dopant within the source and drain region, wherein the implanting of the at least one dopant at the pre-selected temperature facilitates reducing contact resistance of the source and drain region and increasing charge carrier mobility through the channel region; exposing the channel region below the gate structure and implanting the at least one dopant at the pre-selected temperature into the exposed channel region to facilitate modulating an intrinsic stress disposed within the exposed channel region; wherein the at least one dopant comprises a first dopant of a first conductivity type, and the forming further comprises forming an epitaxially grown source and drain region having the first dopant of a first conductivity type disposed therein, and the fabricating further comprises, subsequent to the forming, implanting a second dopant of a second conductivity type at the pre-selected temperature into an upper surface of the epitaxially grown source and drain region.
地址 Grand Cayman KY
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