| 摘要 |
PURPOSE:To constitute a circuit so that an unnecessary higher harmonic component does not appear in a demodulated waveform, by detecting whether each data bit level exceeding continuous 3 bits of a control signal is reversed alternately or not, and holding a demodulation output at a level immediately before detection. CONSTITUTION:When a control signal (a) is inputted to an alternate inversion detecting circuit 12, a signal (b) delayed by a 2-bit portion in the circuit 12 is generated, and is inputted to an up-down counter 21 of a demodulating circuit body 11. While the signal (a) is not reversed alternately, a hold signal (c) of the circuit 12 becomes ''1'', a control gate 13 is opened, and a clock pulse is supplied to the counter 21. In accordance with levels 1, 0 of the signal (b), the counter 21 adds or subtracts 1 unit each to and from the previous level, and D/A-converts at 22 this output, and outputs a demodulation signal (d). While the signal (a) is reversed alternately, the signal (c) of the circuit 12 becomes ''0'', the gate 13 is closed, the clock pulse is not supplied to the counter 21, the counter 21 is held in a state immediately before detecting the alternate reverse, the demodulation waveform becomes a constant value, and an unnecessary higher harmonic component is not contained. |
