| 摘要 |
<p>PURPOSE: To provide an incremental circuit operated at a high speed with a relatively less gate amount by allowing the increment circuit to have the serial connection constitution of cells for generating intermediate carry signals and independently and successively propagating the intermediate carry signals of respective bit pairs in continuous stages. CONSTITUTION: Respective blocks are provided with the 2-4 pieces of 1-bit cells, the block 0 is provided with the two cells, the block 1 is provided with the three cells and the block 2 is provided with the four cells. In the respective blocks (for instance in (j)=0-2), two ripple carry outputs Cout 0 (i) and Cout 1 (i) are generated and the two carry outputs Cout generate the carry output Cout block (j) of the block at present by being combined with a carry input Cin block (j) inputted to the block at present. The chaining of the two carries (Cout0-Cin0 and Cout1-Cin1) are simultaneously and successively propagated in all the blocks of (j)=0-2. Thus, an integrated circuit provided with an easily realizable layout with the excellent using efficiency of a chip area is formed. Thus, this incremental circuit operated at a high speed with the relatively less gate amount is obtained.</p> |
