| 摘要 |
PURPOSE:To simply and detailedly execute the evaluation of an output signal and a system clock by switching whether system clocks are to be outputted from external terminals to the outside of a chip or the external terminals are to be used as I/O terminals for other signals. CONSTITUTION:When a test mode signal is '1', whether system clocks phi1, phi2 are to be outputted or inputted from external terminals 3, 4 is controlled by a clock switching signal. When the switching signal is '0', the output of an AND circuit 17 is '0' and the outputs of inverter circuits 19, 20 and an AND circuit 18 are respectively '1'. Thereby, three-state buffers 11, 12 are turned to high impedance and three-state buffers 8, 9, 14, 15 are turned to output states. Thereby, the output of a frequency dividing circuit 7 is supplied to respective blocks in the chip as the clocks phi1, phi2 and then outputted from the external terminals 3, 4 to the outside of the chip. When the switching signal is '1', signals inputted from the external terminals 3, 4 are supplied to respec tive blocks in the chip as the clocks phi1, phi2. |
