发明名称 UNIQUE WORD DETECTING SYSTEM
摘要 PURPOSE:To set the number of allowable error bits at the optimum level by controlling the number of allowable error bits for the detection of a unique word corresponding to the quality of a satellite line. CONSTITUTION:An allowable error bit number calculation circuit 10-5 performs the estimation of the error rate of a demodulation signal 102 from a demodulator 1 based on the count result of an error pulse from an error pulse counter circuit 10-4, and calculates the undetection rate of the unique word in the arbitrary number of allowable error bits from the error rate, and calculates the number 113 of allowable error bits from the undetection rate, and sends it to a comparator 8. Thereby, it results that the number 113 of allowable error bits compared with the number 106 of noncoincidence from an adder 5 at the comparator 6 always conforms to the change of the quality of the satellite line, and the number 113 of allowable error bits can be set at the optimum level.
申请公布号 JPH03184439(A) 申请公布日期 1991.08.12
申请号 JP19890323160 申请日期 1989.12.13
申请人 NEC CORP 发明人 ENDO SHOJI
分类号 H04J3/06;H04L7/08 主分类号 H04J3/06
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