GATE ARRAY DEVICE HAVING MACRO CELLS FOR FORMING MASTER AND SLAVE CELLS OF MASTER-SLAVE FLIP-FLOP CIRCUIT,申请号EP19890401346-传众专利搜索

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发明名称	GATE ARRAY DEVICE HAVING MACRO CELLS FOR FORMING MASTER AND SLAVE CELLS OF MASTER-SLAVE FLIP-FLOP CIRCUIT
摘要
申请公布号	EP0342131(A3)	申请公布日期	1991.08.07
申请号	EP19890401346	申请日期	1989.05.12
申请人	FUJITSU LIMITED	发明人	TAMAMURA, MASAYA;EMORI, SHINJI;WATANABE, YOSHIO;SHIMOTSUHAMA, ISAO
分类号	H03K3/037;H03K19/086;H03K19/173;(IPC1-7):H03K3/037;H03K19/177	主分类号	H03K3/037
代理机构		代理人
主权项
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