| 摘要 |
PURPOSE:To curtail the area of a unit circuit by the number of curtailed grounding patterns by forming one grounding pattern between two adjacent high frequency elements, and holding this grounding pattern in common by two elements. CONSTITUTION:In both ends of plural high frequency circuit elements E1, E2 formed on a wafer, signal input patterns I1, I2 and signal output patterns O1, O2 are formed. A test of the high frequency circuit element E1 is executed as follows. A high frequency prober IP for an input signal is connected to grounding patterns GI1, GI2 and the signal input pattern, I1, and also, a high frequency prober OP for an output signal is connected to grounding patterns GO1, GO2 and the signal output pattern O1. Subsequently, a prescribed test signal is inputted to the element E1, and an output signal from the element E1 is fetched to the prober OP and evaluated by an external testing device. In such a way, in a wafer stage before a cutting process, each element can be tested. |
