发明名称 Computer interface circuit.
摘要 <p>A plurality of specialized controllers, e.g. 202, 204 & 206, each one adapted to control a particular type of data transfer operation, control the flow of data between a system bus 104 and a local bus 106 on a computer adapter card 102. When the Direct Memory Access DMA controller 202 is controlling a DMA operation on the local bus, certain other controllers 204 & 206 can break-in to the current DMA operation, temporarily halting the DMA operation until the other controller has completed its data transfer operation. To break-in to a DMA operation, handshaking signals between the DMA controller and the local bus interface circuit 212 are temporarily blocked by blocking signals from a break-in logic circuit 210 . The break-in circuit includes a four-state state machine to block the handshaking signals at the appropriate times, and to signal the interrupting controller to begin its data transfer operation. When breaking-in to a DMA operation in this manner, the operation of the DMA controller is not altered; instead, to the DMA controller, it appears that the local bus interface circuit is merely slow to respond with its acknowledge handshake.</p>
申请公布号 EP0428330(A2) 申请公布日期 1991.05.22
申请号 EP19900312210 申请日期 1990.11.08
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 GARCIA, SERAFIN JOSE ELEAZER, JR.;CHISHOLM, DOUGLAS RODERICK;KALMAN, DEAN ALAN;PADGETT, RUSSELL STEPHEN;YODER, ROBERT DEAN
分类号 G06F13/32;G06F13/362 主分类号 G06F13/32
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