| 摘要 |
PURPOSE:To automatically select a retiming signal by setting an output signal of an N frequency dividing circuit as a latch lock signal, and latching an output signal of N pieces of sequences of an N sequence developing circuit. CONSTITUTION:A 2-sequence is constituted of a 1-2 series/parallel converting circuit 104, and a 2-frequency dividing circuit for outputting a latch clock signal is constituted of a 2-frequency dividing circuit 112. Also, a latching circuit for latching an output of the 1-2 series/parallel converting circuit 104 is constituted of D-F/Fs 107, 108, and constituted of a coincidence detecting circuit EX-OR 109 for inputting output signals of these D-F/Fs 107, 108 and executing a coincidence detection of these input signals. Also, a means for controlling a phase of the latch clock signal is constituted of a D-F/F 110, a 2-frequency dividing circuit 111 and an EX-OR 114, and a latching circuit for latching an output signal of the 1-2 series/parallel converting circuit 104 by using a latch clock signal is constituted of a latching circuit 105. In such a case, the latching circuit 105 latches output signals 1041, 1042 of the series/parallel converting circuit 104 without an error by using an output signal of the EX-OR 114. In such a way, a phase synchronizing circuit for automatically selecting a timing signal is obtained. |
