发明名称 SYSTEME DE CORRECTION D'ERREUR D'UN SYSTEME A MULTIPROCESSEURS POUR CORRIGER UNE ERREUR DANS UN PROCESSEUR EN METTANT LE PROCESSEUR EN CONDITION DE CONTROLE APRES ACHEVEMENT DU REDEMARRAGE DU MICROPROGRAMME A PARTIR D'UN POINT DE REPRISE
摘要 In an error recovery system for use in combination with a multiprocessor system processing instructions under microprogram control which is energized on occurrence of an intermittent error in one of the processors to restart the microprogram from a checkpoint in the faulty processor when the microstep restart is allowable and which is energized upon occurrence of a physical error to make another processor take over execution of an instruction processed in the faulty processor, the faulty processor generates a physical error signal after completion of the microprogram restart so that another processor is forced to take over next succeeding procession to be carried out in the faulty processor. When retry of execution of the instruction is allowable on occurrence of the intermittent error, another processor is also forced to take over execution of the instruction. A retry request can previously and manually be inputed into the one processor by an operator so that retry of execution of the instruction is carried out in the faulty processor.
申请公布号 FR2602891(B1) 申请公布日期 1990.12.07
申请号 FR19870011676 申请日期 1987.08.18
申请人 NEC CORP 发明人 AKIHISA MAKITA
分类号 G06F11/14;G06F11/20;G06F11/22;(IPC1-7):G06F15/16;G06F9/46 主分类号 G06F11/14
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