发明名称 RECEIVING DEVICE
摘要 PURPOSE:To execute focusing by means of simple electrical processing of a receiving signal, by sampling each receiving signal at the time when the inphase surface reaches each receiving element, holding it in a memory temporarily, and after that, adding each other. CONSTITUTION:Sampling clocks CL1-CLn for controlling a sampling time of a signal from each receiving element E1-En constituting an array-type receiver are generated by a clock generator CG operated in accordance with a value stored in a memory M0 in advance. Values sampled by sampling means SA1- SA2 are written in a memory M, and are added by an adder A after sample values of each receiving signal to be phased and added have been collected in the memory. In this way, a value being equivalent to a value which is obtained by virtually phasing and adding each receiving signal as it is, which has not been sampled, by some method, and sampling its signal is obtained as an output of the adder A.
申请公布号 JPS57204477(A) 申请公布日期 1982.12.15
申请号 JP19810089667 申请日期 1981.06.12
申请人 HITACHI MEDEIKO:KK 发明人 UMEMURA SHINICHIROU;KURODA MASAO;KATAKURA KAGEYOSHI;OGAWA TOSHIO;TAKABAYASHI YURIKO;MIZUNO SUMINORI
分类号 A61B8/00;A61B8/14;G01N29/24;G01S7/523;G01S7/526;G10K11/34 主分类号 A61B8/00
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