PROCESS FOR INVESTIGATING THE LATCH-UP EXTENSION IN CMOS CIRCUITS,申请号EP19890110151-传众专利搜索

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发明名称	PROCESS FOR INVESTIGATING THE LATCH-UP EXTENSION IN CMOS CIRCUITS
摘要
申请公布号	EP0345702(A3)	申请公布日期	1990.08.16
申请号	EP19890110151	申请日期	1989.06.05
申请人	SIEMENS AKTIENGESELLSCHAFT	发明人	QUINCKE, JORG, DIPL.-ING.;PLIES, JORG, DR. RER. NAT.
分类号	G01R31/302;G01R31/308;G01R31/319;H01L21/66;H01L27/08;(IPC1-7):G01R31/28	主分类号	G01R31/302
代理机构		代理人
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