| 摘要 |
PURPOSE:To correctly execute the destination control of data for each time slot by executing the destination control of the data of each time slot in an input data signal based on destination control data held in a control register unit to be impressed to a selector. CONSTITUTION:A selector 1 select-outputs input data signals DT11-DT1m for executing the destination control. Destination control data DATCNT for each time slot are held once by a buffer register unit 4. The destination control data DATCNT held in the buffer register unit 4 are simultaneously held in a control register unit 3 based on data write signal DATWR. A timing control circuit 2 outputs a control data output signal CDOUT synchronizing to the time slot of the input data signal to the control register unit 3, and the destination control data of the time slot are impressed from the control register 3 to the selector 1 in synchronizing to the time slot.
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