TRANSISTORMINNESANORDNING

摘要

The semiconductor store allowing data to be read-in, stored and read-out simultaneously in two directions, has two multi-bit data lines (1l..1k;2l..2k) coupled to each cell (3ll..3kn) of the storage matrix. Each storage cell (3ll-3kn) has a storage element (4) and two transistors (5,6) coupled to respective data lines (1l..1k;2l..2k). The store also has read-in circuits (11l..11k) each coupled to an input multi-bit data line (16) and to the read-in line (20) and the read-out line (21). Address decoders (23,25) are coupled between the multi-bit address line (24) and the respective matrix lines which can be read-out simultaneously, via data selection control circuits (26l..26n). The read-out data is fed to each of the two data readers via respective read-out amplifiers (12l..12k;33l..33k). The semiconductor store allows a very high integration density for a microprocessor store etc..