Programmable semiconductor memory.

摘要

Memory cells (11) are divided into a plurality of series circuit units arranged in matrix fashion and comprising a plurality memory cells connected in series. The memory cells each consists of non-volatile transistors having a control gate electrode, a floating gate electrode and an erase gate electrode. One end of each series circuit unit is coupled to a bit line (12) with the circuit units in a given row of circuit units being coupled to the same bit line. Column lines (14) are provided wherein each circuit unit in a given column of circuit units has the control gate electrodes of its memory cells coupled to a column line, the control gate electrodes of each memory cell in a given column of memory cells being connected to a common column line. A voltage by which the selected non-volatile transistor is driven to its saturation state is applied to the control gate electrode of the selected transistor through the corresponding column line, thereby injecting hot electrons from the semi-conductor substrate into the floating gate electrode. Another voltage by which the non-selected non-volatile transistor is driven to its non-saturation state is applied to the control gate electrodes of the remaining non-selected non-volatile transistors of the series circuit unit.