| 摘要 |
PURPOSE:To largely improve the integration of a dynamic semiconductor memory by providing a memory cell containing first and second grooves of 2-stage configuration, a second conductivity type semiconductor layer connected to bit lines, a capacity element having a conductive filler as a storage node, and first and second transfer gate electrodes. CONSTITUTION:A memory cell which has first and second grooves dug from the surface of a P-type single crystalline silicon substrate 101 toward its interior, an N-type semiconductor layer 104 connected to bit lines 202, a capacitor element having a conductive filler 106 made of polycrystalline silicon as a storage node, a first transfer gate electrode 103(made of polycrystalline silicon) connected to a word line 206, and a second transfer gate electrode 102(made of polycrystalline silicon) connected to a control signal line 204 disposed in parallel with the bit line 202 is provided. A pair of bit lines 202, 203 connected to a sense amplifier 201 are folded through the amplifier 201 and disposed in parallel. |
