| 摘要 |
<p>PURPOSE:To reduce noise by switching the source of the clock signal supplied to a CPU to a clock signal generating means or a frequency converting means to which a clock signal of a higher frequency is supplied and then to either one of both means to which a clock signal of a lower frequency is supplied when the CPU ends its processing operation. CONSTITUTION:The clock signal supplied from a clock signal generating means 3 is applied to a frequency converting means 4 for change of the frequency of the means 4. When the processing operation of a CPU 1 is started, the source of the clock signal is switched to the means 3 or a frequency converting means 4 to which a clock signal of a higher frequency is supplied. Then the source of the clock signal is switched to the means 3 or 4 to which a clock signal of a lower frequency is supplied when the processing operation of the CPU 1 is finished. In such a way, the clock signal has a lower frequency in a holding state and therefore the noise due to the frequency can be reduced.</p> |
