Digital timing circuit structure for PCM - has input and output shift registers of given bit capacity operating in parallel and opposite directions

摘要

The digital timing circuit structure can be used for PCM networks. They can function for time switching only or can be used in conjunction with three dimensional switching structures. The principle used is one whereby a bit arriving from a channel at a given instant is delayed to an instant corresp. with a second channel. There are input and output static memories each of a capacity equal to half the number of bits. They are in parallel, but shift in opposite directions. The incoming shift register cells will have their inputs selectively transmitted to the corresponding outgoing registers. The timing pulses are synchronised to the circulating memories of the incoming register.