发明名称 SYNCHRONIZATION DETECTING CIRCUIT
摘要 PURPOSE:To make a necessary time up to synchronization establishment constant and to shorten a necessary detecting time by deciding whether or not the detected bit position is continuous over the prescribed number of frames, detecting the position of a complimentary bit C and establishing the synchronization. CONSTITUTION:After the counting of the prescribed number of frames counted by a counter 17, when an AND circuit 20 is opened, and the frame where data '1' are set is in flip flops 14-1-14-11, a signal Pk is given to a flip flop 21 and this is set at the timing corresponding to the bit position. The synchronization establishment for the frame mB1C-encoded by the setting of the flip flop 21 is detected and the synchronization position (position of complimentary bit C) is detected from the signal Pk. The time until synchronization is established is only the desired time of the number of frames. Thus, the synchronization can be established in a short time and always for a constant time.
申请公布号 JPS6489734(A) 申请公布日期 1989.04.04
申请号 JP19870244344 申请日期 1987.09.30
申请人 TOSHIBA CORP 发明人 SEKIYA KUNIHIKO
分类号 H04L7/08;H04J3/06 主分类号 H04L7/08
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