发明名称 CONTROL SYSTEM FOR INPUT/OUTPUT INSTRUCTION
摘要 PURPOSE:To release the loop state of a microprogram by invalidating a request for a held input/output instruction and at the same time producing an interruption to a processor when a CPU detects the time-out state of the input/output instruction and gives a cancel instruction. CONSTITUTION:A means 1 is added to a channel processor to hold temporarily a request for an input/output instruction given from the CPU. Then the means 4, 5 and 6 are added to the channel processor to invalidate the request for the held input/output instruction and at the same time, produce the interruption to the processor after detecting a fact that the CPU detects the time-out state of the input/output instruction and produces a cancel instruction. In such constitution, it is possible to avoid such a case where all channel devices become faulty when the microprogramm is turned into a loop state by a fault in the channel processor.
申请公布号 JPS6476353(A) 申请公布日期 1989.03.22
申请号 JP19870235531 申请日期 1987.09.18
申请人 FUJITSU LTD 发明人 MORI KOJI
分类号 G06F13/12;G06F13/10 主分类号 G06F13/12
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