发明名称 PHASE LOCKED LOOP CIRCUIT
摘要 PURPOSE:To facilitate the recovery of synchronization by giving an output of a loop filter to an amplitude detection circuit and inputting an output of the amplitude detection circuit to a resistor connected to a power voltage and a control terminal of a voltage controlled oscillator. CONSTITUTION:An output voltage of a loop filter 3 is a positive voltage in the locking state, the output voltage of the loop filter 3 becomes an output of an amplitude detection circuit 11 and fed to a control terminal of the voltage controlled oscillator 9 to keep the locking state. On the other hand, if the locking is lost at application of power and the output voltage of the loop filter 3 is a negative voltage, the negative voltage of the loop filter 3 is not fed to the control voltage of the voltage controlled oscillator 9 by a diode 4 of the amplitude detection circuit 11 and a voltage rising gradally up to the power voltage from zero V as a start is fed to the control terminal of the voltage controlled oscillator by a resistor 6. Thus, the synchronization is recovered easily.
申请公布号 JPS63287212(A) 申请公布日期 1988.11.24
申请号 JP19870122961 申请日期 1987.05.20
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 YAMAKAWA KUNIO
分类号 H03L7/093;H03L7/08;H03L7/10 主分类号 H03L7/093
代理机构 代理人
主权项
地址