Multiplication circuit with carry-adder circuit in decimal 1-out-of-10 code

摘要

The multiplication circuit according to the subject of the invention differs from the multiplication circuit according to P3712312.2 in that the number of product AND circuits is reduced from 81 to 45. This reduction of the number of product AND circuits is only possible because of the arrangement of an appropriate input circuit (19a and 19b), using which the bigger factor digit is always processed on the left, if the two factor digits are unequal. <IMAGE>