发明名称 IC TESTING DEVICE
摘要 PURPOSE:To utilize the capacity of a memory effectively by switching a random pattern outputted by a pattern generator and an applied pattern outputted from a memory, and applying them to a reference IC and an IC to be tested as input patterns. CONSTITUTION:Pattern switching control information 7 is outputted with an address outputted by an address generator 10 to switch a pattern switch 3. Then when the switch 3 is switched to the side of the memory 1, the applied pattern 9 is read out of the memory 1 and applied to the reference IC 4 and IC 5 to be tested. When the switch 3 is changed over to the side of the random pattern generator 2, on the other hand, random pattern generation control information 8 is read out of the memory 1 and outputted to the ICs 4 and 5 through the switch 3. Thus, part of the applied pattern is substituted with the random pattern outputted from the pattern generator 2 to test the IC for various data.
申请公布号 JPS63241475(A) 申请公布日期 1988.10.06
申请号 JP19870074527 申请日期 1987.03.30
申请人 ANRITSU CORP 发明人 SHIMURA YASUHIKO
分类号 G01R31/28 主分类号 G01R31/28
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