| 摘要 |
PURPOSE:To simplify the circuit constitution and to quicken the processing speed by converting a data signal into a parallel signal and applying parallel processing to decoding/coding/mis-detection so as to eliminate the need for de-interleave conversion and interleave conversion before and after the code error correction. CONSTITUTION:A serial input signal is converted into a parallel signal by a serial/ parallel converting circuit 21 and fed to a decoding circuit 25 and a storage circuit 23. The signal obtained by the decoding circuit 25 is supplied to a correction bit table 26 of the correction code generating circuit as an address and the output signal of the table 26 is stored in the storage circuit 24. In such a case, a switch 27 is thrown to the position of upper contact and a switch 29 is thrown to the position of the lower contact. Then the switch 27 is thrown to the position of the lower side to supply a data of the storage circuits 24 and 23 to an exclusive OR circuit 28, and its output signal corrects the data of the storage circuit 24. Moreover, the switch 29 is thrown to the position of the upper side to supply the corrected data to a coding circuit 30 from the storage circuit 24. The check bit obtained by coding is added after the data bit and converted into a serial data by a parallel/serial converting circuit 22, then sent.
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