发明名称 MEMORY TEST SYSTEM
摘要 PURPOSE:To surely check a memory regardless of the number of trouble bits by reading out and writing data alternately to two regions of the same capacity provided to a single memory element and checking the abnormality of one of both regions by means of the test data. CONSTITUTION:The test data is written into and read out of a region 12 via a memory test means 3 while the alarm data on a monitoring device is written into a region 11 via a memory control means 2. Thus a memory test is carried out in the region 12. When it is decided that the region 12 is normal, the alarm data is written into the region 12 in the next cycle and simultaneously a memory test of the region 11 is carried out. If the abnormality of the region 12 is decided, the trouble of a memory element 1 itself is decided and this fact is displayed. Thus the use of the element 1 is inhibited so that the memory is surely checked.
申请公布号 JPS63234342(A) 申请公布日期 1988.09.29
申请号 JP19870067818 申请日期 1987.03.24
申请人 TOSHIBA CORP 发明人 OSAWA YUKARI;TAKASO KAZUTO
分类号 G06F12/16 主分类号 G06F12/16
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