| 摘要 |
PURPOSE:To obtain an FET which is not substantially affected by a manufacturing process by retaining to cover a semiinsulating substrate surface with a gate metal layer, and ion implanting and heat treating to activate the implanted impurity. CONSTITUTION:A semi-insulating substrate surface is covered with a gate metal layer 2, a low resistance metal is deposited on the layer 2 at a gate forming position to form a laminate, a high concentration N-type impurity for forming source, drain regions 10, 11 is ion implanted here, and the ions are further activated in this state. Thus, lateral diffusion at the time of heat treating the ion implanted high concentration impurity can be suppressed to obtain an FET which is scarcely affected by the influence of a process.
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