Processing circuit for television sync signals produced from a recording medium for preforming a non-interlaced display

摘要

A television synchronizing signal processing circuit includes a reproduction/demodulation circuit for repetitively reading a video signal corresponding to one field from a video signal recording medium and demodulating the video signal and for separating a synchronizing signal from a reproduced/demodulated signal, a first delay circuit for permitting the video signal of the reproduced/demodulated signal which is supplied for every other field from the reproduction/demodulation circuit to be delayed by a time corresponding to one half the period H of a horizontal synchronizing signal, a second delay circuit for delaying a vertical synchronizing signal of the synchronizing signal which is supplied from the reproduction/demodulation circuit, and a waveform synthesizing circuit for synthesizing output signals from the first and second delay circuits to produce a composite video signal. In the processing circuit, the second delay circuit has a variable time TD which is variable within a range of 0<TD<H/2.