| 摘要 |
PURPOSE:To suppress the number of interruption levels by instructing an interruption destination in instructing the operation attended with interruption so as to change the order of interruption processing. CONSTITUTION:The operation instruction of effective/ineffective operation is applied to lines L1-Ln by an operation instruction signal line 5 and the attribute of the lines L1-Ln and the interruption levels I1-Im are written in the line control memory 2 by the software stored in a CPU 1. Line numbers 1-n of the line scanner 4 are always inputted to the interruption selection circuit 3 and the interruption levels I1-Im corresponding to the line numbers 1-n inputted from the line memory 2 are extracted and the said program of the CPU 1 is interrupted from corresponding interruption level signal lines 61-6m. Moreover, the CPU 1 rewrites the interruption level in the line control memory 2 as required dynamically. Thus, the number of interruption levels is not increased.
|
