发明名称 MULTILAYER INTERCONNECTION SEMICONDUCTOR DEVICE
摘要 PURPOSE:To simplify and stabilize the flattening process of a wiring region by forming a first layer electrode by a high melting-point metal or the silicide of the metal, shaping a BPSG film onto the first layer electrode and executing heat treatment. CONSTITUTION:A P-type impurity diffusion region 28 as a base region is formed in a surface region in an N-type semiconductor substrate 27 as a collector region, and an N-type impurity diffusion region 29 as an emitter region is shaped in a surface region in the region 28. A metallic layer consisting of a high melting-point metal is formed onto the whole surface on a semiconductor substrate 11, and first layer electrodes 30, 31 are shaped through patterning. A BPSG film 32 is grown and formed on the whole surface on the bubstrate 11, and the amorphous high melting-point metallic layers 30, 31 are recrystallized through heat treatment while the BPSG film 2 is melted. Accordingly, the BPSG film 32 is flattened. Contact holes 33, 34 are bored to the BPSG film 32 on the first layer electrodes 30, 31.
申请公布号 JPS6381948(A) 申请公布日期 1988.04.12
申请号 JP19860227252 申请日期 1986.09.26
申请人 TOSHIBA CORP 发明人 ENDO KAZUO;KIMURA TAKASHI
分类号 H01L23/52;H01L21/3205;H01L21/60;H01L21/768;H01L23/482;H01L23/485 主分类号 H01L23/52
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