| 摘要 |
PURPOSE:To provide only one address trace part by instructing the start and the end of an operation for outputting an address and a clock signal which synchronizes with it, to an external address bus, by using an instruction signal. CONSTITUTION:When an address trace part 7 stores the address transition of a first data processing part 1, an address value and a first synchronizing clock 54 on a first internal address bus 51 are sent in order to instruct an output start to an external address bus 60, with respect to a first address buffer part 4 by a first instructing signal 57. By the synchronizing clock signal outputted to the external address bus 60, the address trace part 7 stores an address outputted onto the external address bus 60, and simultaneously, stores a number, as well, corresponding to a first - a n-th address trace parts of the instructing signal 57. This storage operation is continued until it is ended to output the address and the synchronizing clock 54, by outputting an end instruction by the first instructing signal 57.
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