发明名称 |
COPROCESSOR COUPLING SYSTEM |
摘要 |
PURPOSE:To transfer data between a memory and a coprocessor CP in one bus cycle by adding CPS and CPCYCL pins besides memory access signal pins of a microprocessor to select the CP simultaneously with memory access. CONSTITUTION:When an operand is transferred from a memory 3 to a CP 2, a microprocessor (MPU) 1 asserts not only a memory read signal but also a signal (CPCYCL) indicating the validity of coprocessor data and instructs the CP 2 to take in data, and the operand is transferred from the memory to the CP in one bus cycle. When data is transferred from the CP 2 to the memory 3, the MPU 1 asserts not only a memory write signal but also the signal (CPCYCL) and instructs the CP 2 to output data, and the data is transferred from the CP 2 to the memory 3 in one bus cycle.
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申请公布号 |
JPS62214464(A) |
申请公布日期 |
1987.09.21 |
申请号 |
JP19860056844 |
申请日期 |
1986.03.17 |
申请人 |
HITACHI LTD;HITACHI MICRO COMPUT ENG LTD;HITACHI ENG CO LTD |
发明人 |
IWASAKI KAZUHIKO;FUNABASHI TSUNEO;KAWASAKI IKUYA;INAYOSHI HIDEO;HASEGAWA ATSUSHI;YAGINUMA TAKAO;KONDO EIKI |
分类号 |
G06F15/16;G06F9/38;G06F15/167 |
主分类号 |
G06F15/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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