SEMICONDUCTOR MEMORY USING MULTIPLE LEVEL STORAGE STRUCTURE

摘要

: A semiconductor memory for reading and writing stored charges in an X-Y address system has a plurality of memory cells each consisting of one capacitance element and one MOS-FET in matrix. The invention is characterized by the use of a multiple level storage structure for reading and writing of at least three multi-level data stored in the capacitance elements. This result is achieved by applying a multi-level step voltage to the plate electrode of the capacitance or to the gate electrode of the MOS-FET.