| 摘要 |
PURPOSE:To reduce the design time by arranging the same number as that of unit arrays of the 2nd basic cell group including >=1 of basic cell comprising PMOSFETs and NMOSFETs of the same number in the 2nd direction and arranging the array of the 2nd basic cell group and >=1 of the unit blocks in the 1st direction. CONSTITUTION:The basic cell groups 1a, 1b each including at least >=1 of basic cell comprising same number of PMOSFETs and NMOSFETs and a unit array where MOSFETs arrays 4, 12 are arranged in the 1st direction arranged in the 2nd direction are arranged in the 1st direction to constitute a programmable logic array (PLA). Thus, the PLA with arranged height is realized, and in designing an LSI using lots of PLAs, the arrangement is simplified and the design period is decreased. |
