发明名称 USING/SPARE PROCESSOR SWITCHING CONTROL SYSTEM FOR INFORMATION PROCESSING SYSTEM
摘要 PURPOSE:To avoid such a case where an input/output channel operates with a response given from an input/output controller immediately after a switching action and gives disturbance to an information processing system, by stopping temporarily the operations of the input/output channel in addition to a using central processing unit having a fault. CONSTITUTION:When a watch dog timer has a time-out state owing to the fault occurrence of a central processing unit 11, a monitor/control device 50 decides that a using processor 10 has a fault and performs the switching control between the processor 10 and a spare processor by outputting a signal of a high level to an output terminal OUT. This signal produces an interruption to an interruption input terminal INT of the unit 11 via a signal line 52. The unit 1 is sifted to a waiting state of the interruption signal with intervention of an operator and stops its operation. At the same time, the output of a high level of the device 50 is supplied to an enable terminal E of an input/output channel 13 via a signal line 53. When the signal supplied to the terminal E is set at a high level, all system operations are stopped after the internal state is reset.
申请公布号 JPS62106564(A) 申请公布日期 1987.05.18
申请号 JP19850246480 申请日期 1985.11.02
申请人 NEC CORP 发明人 SUDO YOSHIKI
分类号 G06F11/20;G06F15/16 主分类号 G06F11/20
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