| 摘要 |
PURPOSE:To perform error processing without being affected by error occurrence by preparing plural control memory parity error processing routines. CONSTITUTION:If a parity error occurs, an address generating circuit 3 receives its report from a detecting circuit 2 and then inputs the most significant digit bit of the error occurring address 5 to generate the entry address of a parity error processing routine. The value obtained by NOTing the most significant digit bit of the error occurring address 5 is set as the most significant digit bit of the entry address. Thus, the parity processing routine is run without using the microprogram at the part including a PROM where the error occurs.
|
