| 摘要 |
PURPOSE:To attain asynchronous sampling frequency conversion by addressing a series of coefficient set of a coefficient table memory periodically, applying the operation between the coefficient set and an input sample string so as to obtain an output sample value. CONSTITUTION:A counter 2 counting a clock pulse synchronously with a timing pulse in an input sampling frequency fx and forming a series of addressed periodically is provided. A series of coefficient set written in a coefficient table memory 5 is designated sequentially by the address. A digital filter 4 or an operation circuit such as a polynomial interpolation operating circuit uses one of the coefficient set subject to address designation at each output timing in response to an output sampling frequency to apply operation to an input sample string thereby introducing an output sample value. It is not required to measure the time difference of the sample point between the input and the means as to each sample point and the accurate operation of the sampling frequency conversion is expected.
|
