DIGITAL INTEGRATED CIRCUIT COMPRISING COMPLEMENTARY FIELD EFFECT TRANSISTORS

摘要

"Digital integrated circuit comprising complementary field effect transistors." Digital integrated C-MOS circuit in which two crosscoupled P-MOS transistors are connected via two separation transistors (N-MOS) to two complementary switching N-MOS transistor networks. The gate electrodes of the separation transistors are connected to a reference voltage source. The switching speed of the C-MOS circuit is increased in that a) the voltage sweep across the logic network is reduced; b) the P-MOS transistor, which is connected via a separation transistor to a junction of the logic network to be charged, is slightly conducting and so is "ready" to charge this junction, and c) the separation transistor forms between the fully conducting P-MOS transistor and the junction to be discharged of the second logic network a high impedance which prevents the (still conducting) P-MOS transistor from charging the junction.