| 摘要 |
A programmable read only memory includes a transistor having an N type source, an N type drain, and a polysilicon floating gate extending over the channel between the source and drain. The floating gate also extends over and is capacitively coupled to an N well. By applying an electric potential to the N well, the potential on the floating gate above the channel is altered. Within the N well is a P region, which mitigates the decrease in capacitive coupling between the N well and the floating gate caused by carrier depletion.
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