,申请号JP19810215744-传众专利搜索

首页产品黄页商标征信

会员服务注册登录

法人/股东/高管

发明名称
摘要
申请公布号	JPS624849(B2)	申请公布日期	1987.02.02
申请号	JP19810215744	申请日期	1981.12.28
申请人	MATSUSHITA ELECTRIC IND CO LTD	发明人	IRIKURA ISAO
分类号	H01G9/004;H01G9/00	主分类号	H01G9/004
代理机构		代理人
主权项
地址

您可能感兴趣的专利

STRUCTURE AND METHOD OF FORMING SILICIDE ON FINS

IMPROVED FORMATION OF SILICIDE CONTACTS IN SEMICONDUCTOR DEVICES

MIM/RRAM Structure with Improved Capacitance and Reduced Leakage Current

ARRAY SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME

ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF, LIQUID CRYSTAL DISPLAY PANEL AND DISPLAY DEVICE

METHODS OF MAKING THREE DIMENSIONAL NAND DEVICES

Method of Forming Different Voltage Devices with High-K Metal Gate

PACKAGE WITH MEMORY DIE AND LOGIC DIE INTERCONNECTED IN A FACE-TO-FACE CONFIGURATION

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

SEMICONDUCTOR PACKAGE

Semiconductor Devices and Methods of Manufacture Thereof

SEMICONDUCTOR DEVICE

Circuit Probing Structures and Methods for Probing the Same

FIN-SHAPED FIELD-EFFECT TRANSISTOR PROCESS

Vacuum Chuck with Polymeric Embossments

PROCESSING APPARATUS

METHOD OF FORMING FINFET HAVING FINS OF DIFFERENT HEIGHT

Mechanisms for Forming Patterns Using Multiple Lithography Processes

SEMICONDUCTOR CONTACTS AND METHODS OF FABRICATION