发明名称 LINE SPEED DETECTION SYSTEM
摘要 PURPOSE:To change freely the line speed by providing a sampling means, a counting means and a line speed decision means to a line control section to detect automatically the line speed of a communication line. CONSTITUTION:One character of a predetermined character pattern is sent from an opposite terminal equipment 7 via a communication line 6. An identification circuit 21 identifies a logic value of a reception signal (r) to send a signal r0 corresponding to logic 0 to an input terminal I0 of a changeover switch 22 and a signal r1 corresponding to logic 1 to an input terminal I1. A sampling circuit 23 uses a clock signal ck from a clock generating circuit 24 to sampled the received signal r0 corresponding to logic 0 at a bit interval (t) and to send an obtained sampling signal (s) to a counting circuit 25. Let a period for one character be T, then a sampling signal (s) sent the sampling circuit 23 is counted, a count value (n) is sent to a collation circuit 26, which decides a line speed Si by collating the count (n) with sampling values Na-Nb..., Nx-Ny stored in a line speed table 27 and designates the result to a line control section 2.
申请公布号 JPS6212238(A) 申请公布日期 1987.01.21
申请号 JP19850151542 申请日期 1985.07.10
申请人 FUJITSU LTD 发明人 YAMAMOTO YOSHINORI;SAKUMA SHUICHI
分类号 H04L29/08;H04L7/02;H04L13/00 主分类号 H04L29/08
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