| 摘要 |
PURPOSE:To realize more improvement of an integrated degree so that area reduction, while the integrated degree being improved, may be limited to only two elements, the connecting parts of metal wirings and element-isolation regions, by forming a semiconductor memory device equivalent to the previous MOS-type semiconductor memory device, vertically on side walls of semiconductor base grooves. CONSTITUTION:SiO2 is deposited upon the bottom-groove parts, by etching semiconductor bases 6, and forming channel-stop impurity diffusion regions 10, and making SiO2 grow by a reduced-pressure CVD method, and then performing etching-back. Thereafter, capacitor gate insulating films 7 are formed by heat oxidation or the like, with polysilicon made to grow, to compose capacitor gate electrodes 8. A layer-insulating film 12 and transfer-gate insulating film 5 are formed respectively on the surface of the poly-silicon and the surfaces of the semiconductor bases 6, to compose transfer- gate electrodes 4. Anisotropic etching is performed under these conditions, so that the difference of spaces between columnar semiconductor bases 6 allows the transfer- gate electrode 4 not to be isolated at one side of them while being isolated at the other side, between columnar semiconductor bases 5. Thereafter, metal wirings 1 are performed through intermediate insulating films 2. |
