| 摘要 |
PURPOSE:To sharply suppress the power consumption of a frequency synthesizer, by intermittently controlling a charge pump means and power supply switching means which turns off the power supply to a pulse swallow counter under call waiting conditions. CONSTITUTION:The output of a reference oscillator 21 s supplied to a PLL controlling circuit PC and transmitted to a loop filter 24 through a power saving controlling circuit PSC. The output of the filter 24 is transmitted to a voltage controlling oscillator 26 through an LPF25 and controls the oscillating frequency of the oscillator 26. The output of the oscillator 26 is outputted to a mixer circuit as a local oscillating output by a distributor 27 and, at the same time, part of the output is transmitted to a pulse swallow counter 28. A timing controlling circuit 33 intermittently controls AND circuit 34 and 35 constituting a charge pump and an AND circuit 36 which inputs the output of the counter 28 by means of control pulses under call waiting conditions. The circuit 33 also intermittently controls a power supply switch 31 which controls the circuit 28 by means of a power supply controlling pulse under the same condition. Therefore, the power consumption can be reduced sharply. |
