发明名称 COMPOUND SEMICONDUCTOR DEVICE
摘要 PURPOSE:To implement a semiconductor device which operates at a high speed, by alternately laminating thin film layers of InAs and AlAs, and adding an N-type impurity into AlAs, thereby enabling a two-dimensional electron storage layer to be formed at the InAs side which is being subjected to elastic tetragonal deformation. CONSTITUTION:A channel layer is provided which has a construction in which InAs layers (40Angstrom thick) 2 formed using the MBE growth method and AlAs layers (40Angstrom thick) 3 are alternately laminated on a semi-insulating InP substrate 1. In the AlAs layers, Si is doped as an N-type impurity. The InAs layers 2 are subjected to elastic tetragonal deformation in the crystal structure thereof, large energy discontinuity exists at the InAs-AlAs interface, and only the AlAs layers 3 are doped with Si. With this, even at a room temperature, a two-dimensional electron storage layer is formed only in the InAs layers 2, which has a larger entrapment effect as compared with the conventional GaAs-GaxAl1-xAs system.
申请公布号 JPS61278168(A) 申请公布日期 1986.12.09
申请号 JP19850119328 申请日期 1985.05.31
申请人 SUMITOMO ELECTRIC IND LTD 发明人 MATSUI YUICHI
分类号 H01L21/203;H01L21/338;H01L29/10;H01L29/15;H01L29/205;H01L29/778;H01L29/812 主分类号 H01L21/203
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