| 摘要 |
PURPOSE:To make it possible to read/write picture data at high speed by connecting address input ends with the control input ends of plural memory boards in parallel to an address bus and control bus and connecting the data input/output end of 1 bit of each memory board separately to the plural bit lines of a data bus. CONSTITUTION:A data bus selector 28 selects to which bit line out of eight bit lines D1-D8 of a data bus 22 the data input/output line of 1 bit from a controlling circuit 26 is to be connected. The data input/output line of each memory board MB1 is connected to plural bit lines of the data bus 22 separately. However, an address input end and a control input end are connected to an address bus 18 and control bus 20 in parallel, and address signals and controlling signals on the bus are applied in common to memory boards MB1-MB4. Accordingly, the memory boards MB1-MB4 are accessed by the address signals simultaneously, and corresponding data of 1 bit are read out.
|
