| 摘要 |
The adding circuit according to the subject-matter of the invention consists of an input circuit 3 and 4 up-shifting circuits 4 to 7 with the shifting number 2 and an up-shifting circuit 8 with the shifting number 1 and the summand-separating circuit 2 by means of which the summand present at the F inputs is separated into part-summands. The shifting circuits 4 to 8 are combined with one linear circuit each. In the input area B, the odd summands 1 and 3 and 5 and 7 and 9 are processed decremented by the number 1. <IMAGE>
|
