发明名称 INSULATED MOLDING TYPE SEMICONDUCTOR DEVICE
摘要 <p>PURPOSE:To reduce thermal resistance and to minimize stress applied to a semiconductor chip on the fitting of an external fin by specifying each linear expansion coefficient and modulus of longitudinal elasticity of a metallic substrate, a sub-metallic substrate and an insulating plate in a device in which the semiconductor chip is mounted to the metallic substrate through the sub-metallic substrate and the insulating plate. CONSTITUTION:A semiconductor chip 10 is bonded directly with a metallic conductor pattern 8a on an insulating plate 7 only through a solder material 9a. Consequently, the increase of thermal resistance is avoided, and thermal resistance is reduced. The quality of materials of a metallic substrate 2, a sub-metallic substrate 4 and the insulating plate 7 are selected so that alpha3<alpha1<alpha2 and E2<E1<=E3 hold at all times in the relationship of their several linear expansion coefficients alpha1-alpha3 and modulli of longitudinal elasticity E1-E3 of the metallic substrate 2, the sub-metallic substrate 4 and the insulating plate 7, and the warpage of the metallic substrate 2 generated on the insulating plate 7 side is minimized. Accordingly, when tapped holes 18a, 18b for the metallic substrate 2 are clamped to external fins with screws, a thermal conduction area with the fins is ensured widely, and thermal resistance can be reduced while fastening stress applied to the semiconductor chip 10 is also minimized.</p>
申请公布号 JPS61237456(A) 申请公布日期 1986.10.22
申请号 JP19850077540 申请日期 1985.04.13
申请人 HITACHI LTD;HITACHI HARAMACHI SEMICONDUCTOR LTD 发明人 YAMAZAKI TATSUO;MIURA MASATAMI;FUJII MASAMI;IIMURA KENJI;NAKAJIMA YOICHI
分类号 H01L23/29;H01L23/14;H01L23/28;H01L23/373 主分类号 H01L23/29
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