| 摘要 |
PURPOSE:To attain high speed operation even at a high load capacitance by connecting bipolar transistors (TRs) in so-called totempole form so as to constitute the output stage of a logic circuit, and providing a control section comprising MOS TRs thereby decreasing the load capacitance dependancy of the rise, fall time of an output signal. CONSTITUTION:When the signal state inputted to an input terminal In goes to an H level, the H level signal is fed to a gate of the 1st PMOS 7 and an NMOS 9, the PMOS 7 turns on to off and the NMOS 9 turns off to on. Thus, the 1st NPN 15 turns on to off and the 2nd NPN 17 is turned off to on, then the electric charge stored in the load capacitor connected to an output terminal OUT flows to a Vss terminal 21 via the 2nd NPN 17 and the level of the output terminal OUT goes to an L level. When the signal inputted to the input terminal IN changes to an L level, the output terminal OUT goes to an H level.
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