| 摘要 |
PURPOSE:To raise the data transfer efficiency by inputting a memory address in which an input/output control of a low data transfer density of an input or an output is executed, and executing a data input/output control basd on this memory address. CONSTITUTION:A data which is outputted by an output device 26 is written in a buffer memory 29 by a DMAC27, and a data whose transfer is requested by an input device 25 is read out of the buffer memory 29 by a DMAC28. Also, a data transfer density of the time of an output by the DMAC28 is high, and a data transfer density by the DMAC27 of the time of an input is low, therefore, a CPU21 controls a data output of a data transfer by the DMAC28, and executes freely a data input of a data transfer by the DMAC27. |
